B&B Electronics PC Watchdog Timer Card ATRWDT Manuel d'utilisateur télécharger pdf (Page 4)

P104-WDG-CSM User Manual

TABLE OF CONTENTS

Chapter 1: Introduction ..................................................................................................................... 5

Watchdog .......................................................................................................................................... 5

Figure 1-1: Block Diagram........................................................................................................ 6

Watchdog Models ........................................................................................................................... 6

P104-WDG-E: Economy Basic Watchdog ............................................................................ 6

P104-WDG-CSM: Standard Watchdog with Computer Status Monitor ........................ 7

P104-WDG-CSMA: Standard Watchdog with Advanced Computer Status Monitor .8

Ordering Guide / P1 Connector Configurations ..................................................................... 9

Model Options.................................................................................................................................. 9

Included with your board.............................................................................................................. 9

Chapter 2: Installation...................................................................................................................... 10

Hardware Installation ................................................................................................................... 11

Figure 2-1: Fan Connection Diagram................................................................................... 12

Chapter 3: Address Selection........................................................................................................ 13

Chapter 4: Programming................................................................................................................. 14

Register Definitions...................................................................................................................... 14

Table 4-1: Register Address Map.......................................................................................... 14

Three events will generate an active-low RESET at P1-12: ............................................... 14

Seven events may generate interrupts ................................................................................... 14

82c54 Registers (BASE +0 thru +3).......................................................................................... 15

Status Register (BASE+4)........................................................................................................... 15

Computer Temperature Monitor (BASE+5) ............................................................................ 15

A/DC Channel #1 (BASE+6)........................................................................................................ 15

Watchdog Programming Options (BASE+7) ......................................................................... 15

Status Register Image (BASE+8) .............................................................................................. 15

Disable Interrupts (BASE+9) ...................................................................................................... 15

A/DC Channel #2 (BASE+A) ....................................................................................................... 15

A/DC Channel #3 (BASE+B) ....................................................................................................... 16

82c54 Out 2 (BASE+C)................................................................................................................. 16

TTL & Isolated Output (BASE+D).............................................................................................. 16

TTL & Isolated Output (BASE+E).............................................................................................. 16

The CONTROL register (BASE+F) enables/disables six circuits:.................................... 16

To Program the Watchdog Interval .......................................................................................... 17

Debug Script to Initialize the Counter/Timers ................................................................... 17

Foreground Watchdog Mode ................................................................................................. 17

Background Watchdog Mode ................................................................................................ 19

Combination Reset Mode........................................................................................................ 19

Chapter 5: Connector Pin Assignments ..................................................................................... 20

Table 5-1: Connector P1 Pin Assignments (40 pin shrouded header) ....................... 20

Chapter 6: Specification.................................................................................................................. 21

Appendix A: Programmable Interval Timer ............................................................................... 22

Customer Comments ....................................................................................................................... 26

1 2 3 4 5 6 7 8 9 ... 25 26

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