B&B Electronics Asynchronous to Synchronous Converter 2010 Manuel d'utilisateur télécharger pdf (Page 10)

Department of Computer Science and Electronics

In addition, setting TXEN, in the UCSRB register, transmission is enabled.

Before a transmission it should do nothing until UDR is ready for more data to be

written to it. This can be checked with the UDRE bit in UCSRA register. The transmit

buffer can only be written when the UDRE Flag in the UCSRA register is set. Any data

written to UDR when the UDRE Flag is not set will be ignored by the USART

Transmitter. When data is written to the transmit buffer, and the Transmitter is enabled,

the Transmitter will load the data into the transmit Shift Register when the Shift

On the other hand, setting RXEN, in the UCSRB register, receiving is enabled.

The USART Receiver has one flag that indicates the receiver state. Therefore the

Receive Complete (RXC) Flag indicates if there are unread data present in the receive

buffer. This flag is one when unread data exist in the receive buffer, and zero when the

receive buffer is empty (i.e., does not contain any unread data). If the receiver is

disabled (RXEN = 0), the receive buffer will be flushed and consequently the RXC bit

will become zero.

Receive and transmit buffer can be read and write by the UDR I/O location.

The UBRRH register shares the same I/O location as the UCSRC register.

Therefore some special consideration must be taken when accessing this I/O location.

When doing a write access of this I/O location, the high bit of the value written, the

USART Register Select (URSEL) bit controls which one of the two registers that will

be written. If URSEL is zero during a write operation, the UBRRH value will be

updated. If URSEL is one, the UCSRC setting will be updated.

Finally, register UBRR must also be set. The formula in figure 2-5 calculates the

value for this register.

Thus, the only issue confronting the programmer is to ensure that the serial

communication parameters of both the transmitter and the receiver match. Specially,

this includes setting the correct number of data bits (usually 8), determining whether or

not to include a parity bit (usually not), and setting the baud rate. [6]

Figure 2-5. Calculate the UBRR register value

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B&B Electronics Asynchronous to Synchronous Converter 2010 Manuel d'utilisateur Page 10